Part Number Hot Search : 
WPCT301 200BZC MC148806 XG036 KE200 HC908 TE202 TA8132AF
Product Description
Full Text Search
 

To Download MC14511BCP Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 MC14511B BCD-To-Seven Segment Latch/Decoder/Driver
The MC14511B BCD-to-seven segment latch/decoder/driver is constructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4-bit storage latch, an 8421 BCD-to-seven segment decoder, and an output drive capability. Lamp test (LT), blanking (BI), and latch enable (LE) inputs are used to test the display, to turn-off or pulse modulate the brightness of the display, and to store a BCD code, respectively. It can be used with seven-segment light-emitting diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal readouts either directly or indirectly. Applications include instrument (e.g., counter, DVM, etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses.
http://onsemi.com MARKING DIAGRAMS
16 PDIP-16 P SUFFIX CASE 648 MC14511BCP AWLYYWW 1 16 SOIC-16 D SUFFIX CASE 751B 1 16 SOIC-16 DW SUFFIX CASE 751G 1 16 SOEIAJ-16 F SUFFIX CASE 966 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week MC14511B AWLYWW 14511B 14511B AWLYWW
* * * * * * * * * * * *
Low Logic Circuit Power Dissipation High-Current Sourcing Outputs (Up to 25 mA) Latch Storage of Code Blanking Input Lamp Test Provision Readout Blanking on all Illegal Input Combinations Lamp Intensity Modulation Capability Time Share (Multiplexing) Facility Supply Voltage Range = 3.0 V to 18 V Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range Chip Complexity: 216 FETs or 54 Equivalent Gates Triple Diode Protection on all Inputs
AWLYYWW
MAXIMUM RATINGS (Voltages Referenced to VSS) (2.)
Symbol VDD Vin I PD TA Tstg IOHmax POHmax Parameter DC Supply Voltage Range Input Voltage Range, All Inputs DC Current Drain per Input Pin Power Dissipation, per Package (3.) Operating Temperature Range Storage Temperature Range Maximum Output Drive Current (Source) per Output Maximum Continuous Output Power (Source) per Output (4.) Value - 0.5 to +18.0 - 0.5 to VDD + 0.5 10 500 - 55 to +125 - 65 to +150 25 50 Unit V V mA mW C C mA mA
ORDERING INFORMATION
Device MC14511BCP MC14511BD MC14511BDW MC14511BDWR2 MC14511BF MC14511BFEL Package PDIP-16 SOIC-16 SOIC-16 SOIC-16 SOEIAJ-16 SOEIAJ-16 Shipping 2000/Box 48/Rail 47/Rail 1000/Tape & Reel See Note 1. See Note 1.
2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C 4. POHmax = IOH (VDD - VOH)
(c) Semiconductor Components Industries, LLC, 2000
1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.
1
March, 2000 - Rev. 3
Publication Order Number: MC14511B/D
MC14511B
This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit. A (Vin or Vout) VDD. destructive high current mode may occur if Vin and Vout are not constrained to the range VSS Due to the sourcing capability of this circuit, damage can occur to the device if VDD is applied, and the outputs are shorted to VSS and are at a logical 1 (See Maximum Ratings). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD).
v
v
PIN ASSIGNMENT
B C LT BI LE D A VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD f g a b c d e e d f a g b c
DISPLAY
0
1
2
3
4
5
6
7
8
9
TRUTH TABLE LE BI LT XX0 X01 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 0 11 1 11 Inputs D C X X X X 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 X X B X X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 X A X X 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 X a 1 0 1 0 1 1 0 1 0 1 1 1 0 0 0 0 0 0 b 1 0 1 1 1 1 1 0 0 1 1 1 0 0 0 0 0 0 c 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 d 1 0 1 0 1 1 0 1 1 0 1 0 0 0 0 0 0 0 * Outputs e f 1 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 g 1 0 0 0 1 1 1 1 1 0 1 1 0 0 0 0 0 0 Display 8 Blank 0 1 2 3 4 5 6 7 8 9 Blank Blank Blank Blank Blank Blank *
X = Don't Care * Depends upon the BCD code previously applied when LE = 0
http://onsemi.com
2
MC14511B
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 VIH 5.0 10 15 VOH Source 5.0 4.1 -- 3.9 -- 3.4 -- 9.1 -- 9.0 -- 8.6 -- 14.1 -- 14 -- 13.6 -- 0.64 1.6 4.2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.1 -- 5.0 10 20 4.1 -- 3.9 -- 3.4 -- 9.1 -- 9.0 -- 8.6 -- 14.1 -- 14 -- 13.6 -- 0.51 1.3 3.4 -- -- -- -- -- 4.57 4.24 4.12 3.94 3.70 3.54 9.58 9.26 9.17 9.04 8.90 8.70 14.59 14.27 14.18 14.07 13.95 13.70 0.88 2.25 8.8 0.00001 5.0 0.005 0.010 0.015 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.1 7.5 5.0 10 20 4.1 -- 3.5 -- 3.0 -- 9.1 -- 8.6 -- 8.2 -- 14.1 -- 13.6 -- 13.2 -- 0.36 0.9 2.4 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1.0 -- 150 300 600 Adc pF Adc Vdc 3.5 7.0 11 -- -- -- 3.5 7.0 11 2.75 5.50 8.25 -- -- -- 3.5 7.0 11 -- -- -- Vdc Min -- -- -- - 55_C 25_C 125_C Max Min -- -- -- Typ (5.) 0 0 0 Max Min -- -- -- Max Unit Vdc Output Voltage Vin = VDD or 0 "0" Level 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 Vdc "1" Level Vin = 0 or VDD Input Voltage # "0" Level (VO = 3.8 or 0.5 Vdc) (VO = 8.8 or 1.0 Vdc) (VO = 13.8 or 1.5 Vdc) "1" Level (VO = 0.5 or 3.8 Vdc) (VO = 1.0 or 8.8 Vdc) (VO = 1.5 or 13.8 Vdc) Output Drive Voltage (IOH = 0 mA) (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) (IOH = 0 mA) (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) (IOH = 0 mA) (IOH = 5.0 mA) (IOH = 10 mA) (IOH = 15 mA) (IOH = 20 mA) (IOH = 25 mA) Output Drive Current (VOL = 0.4 V) (VOL = 0.5 V) (VOL = 1.5 V) Input Current Input Capacitance Quiescent Current (Per Package) Vin = 0 or VDD, Iout = 0 A Total Supply Current (6.) (7.) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) IOL Sink 5.0 10 15 Iin Cin IDD 15 -- 5.0 10 15 5.0 10 15 VIL -- -- -- -- -- -- 2.25 4.50 6.75 -- -- -- VOH 4.1 9.1 14.1 4.1 9.1 14.1 4.57 9.58 14.59 4.1 9.1 14.1 Vdc Vdc 10 15 Vdc mAdc IT IT = (1.9 A/kHz) f + IDD IT = (3.8 A/kHz) f + IDD IT = (5.7 A/kHz) f + IDD Adc 5. Noise immunity specified for worst-case input combination. Noise Margin for both "1" and "0" level = 1.0 Vdc min @ VDD = 5.0 Vdc 2.0 Vdc min @ VDD = 10 Vdc 2.5 Vdc min @ VDD = 15 Vdc 6. The formulas given are for the typical characteristics only at 25_C. 7. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + 3.5 x 10-3 (CL - 50) VDDf where: IT is in A (per package), CL in pF, VDD in Vdc, and f in kHz is input frequency.
http://onsemi.com
3
MC14511B
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
SWITCHING CHARACTERISTICS (8.) (CL = 50 pF, TA = 25_C)
Characteristic Symbol tTLH VDD Vdc 5.0 10 15 tTHL 5.0 10 15 tPLH 5.0 10 15 tPHL 5.0 10 15 5.0 I0 15 tPHL 5.0 10 15 5.0 10 15 tPHL 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 100 40 30 60 40 30 520 220 130 640 250 175 720 290 200 600 200 150 485 200 160 313 125 90 313 125 90 -- -- -- -- -- -- 260 110 65 1280 500 350 1440 580 400 ns 750 300 220 970 400 320 ns 625 250 180 625 250 180 -- -- -- -- -- -- -- -- -- ns -- -- -- 125 75 65 250 150 130 ns Min -- -- -- Typ 40 30 25 Max 80 60 50 ns Unit ns Output Rise Time tTLH = (0.40 ns/pF) CL + 20 ns tTLH = (0.25 ns/pF) CL + 17.5 ns tTLH = (0.20 ns/pF) CL + 15 ns Output Fall Time tTHL = (1.5 ns/pF) CL + 50 ns tTHL = (0.75 ns/pF) CL + 37.5 ns tTHL = (0.55 ns/pF) CL + 37.5 ns Data Propagation Delay Time tPLH = (0.40 ns/pF) CL + 620 ns tPLH = (0.25 ns/pF) CL + 237.5 ns tPLH = (0.20 ns/pF) CL + 165 ns tPHL = (1.3 ns/pF) CL + 655 ns tPHL = (0.60 ns/pF) CL + 260 ns tPHL = (0.35 ns/pF) CL + 182.5 ns Blank Propagation Delay Time tPLH = (0.30 ns/pF) CL + 585 ns tPLH = (0.25 ns/pF) CL + 187.5 ns tPLH = (0.15 ns/pF) CL + 142.5 ns tPHL = (0.85 ns/pF) CL + 442.5 ns tPHL = (0.45 ns/pF) CL + 177.5 ns tPHL = (0.35 ns/pF) CL + 142.5 ns Lamp Test Propagation Delay Time tPLH = (0.45 ns/pF) CL + 290.5 ns tPLH = (0.25 ns/pF) CL + 112.5 ns tPLH = (0.20 ns/pF) CL + 80 ns tPHL = (1.3 ns/pF) CL + 248 ns tPHL = (0.45 ns/pF) CL + 102.5 ns tPHL = (0.35 ns/pF) CL + 72.5 ns Setup Time tPLH tPLH tsu Hold Time th ns Latch Enable Pulse Width tWL ns 8. The formulas given are for the typical characteristics only.
http://onsemi.com
4
MC14511B
Input LE low, and Inputs D, BI and LT high. f in respect to a system clock. All outputs connected to respective CL loads. 20 ns A, B, AND C 90% 50% 1 2f 20 ns VDD 10% VSS VOH VOL
50% DUTY CYCLE ANY OUTPUT 50%
Figure 1. Dynamic Power Dissipation Signal Waveforms
20 ns INPUT C tPLH OUTPUT g 50% 10% tTLH tTHL 90% 50% 10% tPHL 90%
20 ns VDD VSS VOH VOL
(a) Inputs D and LE low, and Inputs A, B, BI and LT high.
20 ns 90% 50% th tsu VDD INPUT C 50% VSS VOH OUTPUT g VOL VDD VSS
LE
10%
(b) Input D low, Inputs A, B, BI and LT high.
20 ns LE 90% 50% 10% tWL
20 ns VDD VSS
(c) Data DCBA strobed into latches. Figure 2. Dynamic Signal Waveforms
http://onsemi.com
5
MC14511B
CONNECTIONS TO VARIOUS DISPLAY READOUTS LIGHT EMITTING DIODE (LED) READOUT
VDD VDD
COMMON CATHODE LED
COMMON ANODE LED
1.7 V
1.7 V
VSS
VSS
INCANDESCENT READOUT
VDD VDD
FLUORESCENT READOUT
VDD
**
DIRECT (LOW BRIGHTNESS)
FILAMENT SUPPLY VSS VSS VSS OR APPROPRIATE VOLTAGE BELOW VSS.
(CAUTION: Maximum working voltage = 18.0 V)
GAS DISCHARGE READOUT
APPROPRIATE VOLTAGE
LIQUID CRYSTAL (LCD) READOUT
EXCITATION (SQUARE WAVE, VSS TO VDD)
VDD
VDD
1/4 OF MC14070B
VSS ** A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament.
VSS Direct dc drive of LCD's not recommended for life of LCD readouts.
http://onsemi.com
6
MC14511B
LOGIC DIAGRAM
BI 4
13 a A7 12 b
11 c B1 10 d
9e
15 f C2 14 g LT 3 D6
LE 5
VDD = PIN 16 VSS = PIN 8
http://onsemi.com
7
MC14511B
PACKAGE DIMENSIONS
-A-
16 9
PDIP-16 P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
B
1
8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
http://onsemi.com
8
MC14511B
PACKAGE DIMENSIONS
SOIC-16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-A-
16
9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
DIM A B C D F G J K M P R
http://onsemi.com
9
MC14511B
PACKAGE DIMENSIONS
SOIC-16 DW SUFFIX PLASTIC SOIC PACKAGE CASE 751G-03 ISSUE B
D
16 M 9
A
q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 10.15 10.45 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
H
B
1
8
16X
B TA
S
B B
S
h X 45 _
M
8X
0.25
E
0.25
M
A1
14X
e
SEATING PLANE
DIM A A1 B C D E e H h L
A
L
T
C
q
http://onsemi.com
10
MC14511B
PACKAGE DIMENSIONS
SOEIAJ-16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966-01 ISSUE O
LE Q1 E HE
1 8
16
9
M_ L DETAIL P
Z D e A VIEW P
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
http://onsemi.com
11
MC14511B
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
http://onsemi.com
12
MC14511B/D


▲Up To Search▲   

 
Price & Availability of MC14511BCP

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X